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ocr_text: Strained Si MOSFET Technology\n» Strained Si channels have been introduced since the 90 nm node technology Use of\nepitaxial processes involving MOCVD or MBE growth\nS higher speed operation [a H) & improved current-voltage performances\n> The carrier mobility increase, implemented by appropriate Si strain, provides higher speed of the\ncarriers under the same conditions of polarization and a fixed oxide thickness.\nOr with the same current conditions in the channel, thicker oxides and/or lower voltage supply\ncan be used ===) relaxation of compromise between current, consumption\n& short channel effects\n> Ge has a lattice constant of 5.658 A with Si (5.431 A) === up to 4.2% lattice-mismatch\n5.\n5.65 <s Use of an SiGe « template » to biaxially strain Si\n2s --> The tensile stress causes an increase in the\ni o lattice parameter of strained silicon\ns JAP 35 1964, 2899) “FFE\n0 02 04 06 08 10 -
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